Regviz

Alif Semiconductor /AE722F80F55D5AS_CM55_HE_View /LPGPIO /GPIO_INTMASK

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GPIO_INTMASK

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Alif Semiconductor/AE722F80F55D5AS_CM55_HE_View/LPGPIO/GPIO_INTMASK#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)GPIO_INTMASK

GPIO_INTMASK=Val_0x0

Description

GPIO Port Interrupt Mask Register

Fields

GPIO_INTMASK

Writing a 1 to a bit in this field masks the interrupt generation capability for this corresponding GPIO signal. Otherwise interrupts are allowed through. The unmasked status is read as well as the resultant status after masking. All interrupt bits are unmasked by default.

0 (Val_0x0): Interrupt bits are unmasked

1 (Val_0x1): Interrupt bits are masked

Links

()

Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data